FIG. 1 is a perspective view illustrating a structure according to an exemplary embodiment of the present disclosure.

A capacitor according to an exemplary embodiment in the present disclosure may include a structure 110.

The structure 110 may include a plurality of openings 111 penetrating from a lower surface 110a of the structure 110 to an upper surface 110b opposing the lower surface 110a. Since the opening may be referred to as a pore, the structure may be referred to as a porous structure. Such a porous structure may be obtained by machining an anodic aluminum oxide (AAO) structure in which pores having a nanometer size (10 nm to 400 nm) are regularly arranged on a surface by an anodic oxidation method. An interval between the pores may be about several tens to several hundred nanometers. A size, an interval and a depth of the pores may be variously adjusted by changing conditions of the anodic oxidation method such as an anodic oxidation voltage, the type and concentration of electrolyte, and a temperature. A capacitor manufactured in a dot form on a wafer through an atomic layer deposition (ALD) process using the AAO structure is disclosed in a reference document (Banerjee et al., ECS Transactions, 25 (4) 345-353, 2009).

FIG. 2 is a perspective view illustrating a capacitor according to an exemplary embodiment of the present disclosure and FIG. 3 is a cross-sectional view illustrating a YZ surface of the capacitor taken along a line I-I′ of FIG. 2.