In some embodiments, the ILD layer 124 is formed by chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PE-CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), spin-on coating, other suitable formation process(es), or combinations thereof. In some embodiments, the ILD layer 124 is formed using a same process as that used to form CESL 122. In some embodiments, the ILD layer 124 is formed using a different process from that used to form CESL 122.

FIG. 2J is a cross-sectional view of semiconductor device 200 following formation of contact openings in accordance with some embodiments. In some embodiments, a contact etch pattern (not shown) is formed on the surface of the ILD layer 124. The contact etch pattern exposes predetermined regions of the ILD layer 124 overlying the conductive layers 114, 118, 119. In some embodiments, a plasma etch process, a combination wet/dry etch processes, other suitable etch process(es), or a combination thereof, is then used to form contact openings 126. The contact openings 126 extend through the ILD layer 124 and the CESL 122 (when present) and expose contact regions on the upper surface regions 114′, 118′, 119′ of the conductive layers 114, 118, 119. In some embodiments including both a CESL and an ILD layer, the materials, layer thicknesses, and/or the etch chemistry or chemistries are selected to provide different etch rates for the CESL and ILD layer. The different etch rates allow the ILD layer material to be cleared from the contact openings using a predetermined or controlled degree of overetch while reducing the likelihood of damage to the surface of the conductive materials underlying the CESL.