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Trench capacitor and method of forming the same

專利號(hào)
US10868107B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.(TW Hsinchu)
發(fā)明人
Tao-Cheng Liu; Shih-Chi Kuo; Tsai-Hao Hung; Tsung-Hsien Lee
IPC分類
H01L49/02; H01L21/768; H01L29/94; H01L27/08
技術(shù)領(lǐng)域
trench,layer,dielectric,conductive,capacitor,in,substrate,layers,ild,some
地域: Hsinchu

摘要

Methods of manufacturing trench capacitors include forming a trench opening in a substrate, depositing a first dielectric layer over a sidewall and a bottom surface of a first trench opening in a substrate, and depositing a first conductive layer over the first dielectric layer. The first dielectric layer and the first conductive layer are then planarized to expose a planarized top surface of the substrate and a planarized top surface of the first conductive layer in the first trench opening. An ILD layer is deposited over the planarized top surface of the substrate and over the planarized surface of the first conductive layer. A first electrical contact is formed through the ILD layer to provide an electrical connection to the first conductive layer within the first trench opening.

說(shuō)明書(shū)

FIG. 3 is a flowchart of a method 300 of making a semiconductor device in accordance with some embodiments. In operation 302, a mask pattern is formed on a suitable substrate. In operation 304, exposed regions of the substrate are etched to form a trench or trench opening. A series of alternating dielectric and conductive layers are then deposited, in operation 306, on the etched substrate to form a basic trench capacitor structure including N pairs of dielectric and conductive layers. The resulting structure is planarized, in operation 308, to remove those portions of the alternating dielectric and conductive layers that extend above a plane defined by the substrate surface and form the final capacitor structure. In operation 310, an interlayer dielectric (ILD) layer is deposited on the planarized surface. A series of contact openings are formed through the ILD layer, in operation 312, to expose surface regions of the conductive layers. In operation 314, a conductive pattern is then formed on the ILD layer in order to establish electrical connections between the trench capacitor and other electrical components.

In some embodiments, an order of operations for the method 300 is adjusted. In some embodiments, at least one process of method 300 is omitted. In some embodiments, at least one process is added to method 300 to form a final semiconductor device.

權(quán)利要求

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