This description of the exemplary embodiments is intended to be read in connection with the accompanying drawings, which are to be considered part of the entire written description. In the description, relative terms such as “l(fā)ower,” “upper,” “horizontal,” “vertical,” “above,” “below,” “up,” “down,” “top” and “bottom” as well as derivative thereof (e.g., “horizontally,” “downwardly,” “upwardly,” etc.) should be construed to refer to the orientation as then described or as shown in the drawing under discussion. These relative terms are for convenience of description and do not require that the apparatus be constructed or operated in a particular orientation. Terms concerning attachments, coupling and the like, such as “connected” and “interconnected,” refer to a relationship wherein structures are secured or attached to one another either directly or indirectly through intervening structures, as well as both movable or rigid attachments or relationships, unless expressly described otherwise.

The design rules utilized in the layout and manufacture of semiconductor devices such as DRAMs continue to reduce device dimensions in order to meet advanced device density and performance targets. Successfully fabricating devices with such small dimensions and tolerances involves precise control in the associated manufacturing operations. For example, methods of forming multilayer trench capacitors include multiple steps of depositing alternating conductive and dielectric layers in a trench followed by repeated cycles of patterning, etching, or pattern removal to produce the designed capacitor or capacitor array. Deeper trenches facilitate increased capacitance density without increasing a surface area of a semiconductor substrate dedicated to the capacitor structure.