FIG. 1 is a cross-sectional view of a semiconductor device 100 in accordance with some embodiments. Semiconductor device 100 includes a substrate 102. A first trench capacitor structure 120 is in substrate 102. A second trench capacitor structure 120′ is in substrate 102. Trench capacitor structures 120, 120′ each include alternating pairs of dielectric layers and conductive layers. A contact etch stop layer (CESL) 122 is over a substantially planar top surface of substrate 102. CESL 122 extends over trench capacitor structures 120, 120′. An interlayer dielectric (ILD) layer 124 is over CESL 122. Contact plugs 130, 130′ extend through ILD layer 124 and CESL 122 and electrically connect to individual conductive layers in trench capacitor structures 120, 120′. In some embodiments, one of contact plugs 130″ is electrically connected to substrate 102 to provide a ground contact for semiconductor device 200. Conductive lines 138 electrically connect contact plugs 130 which are connected to trench capacitor structure 120 or 120′. In some embodiments, conductive lines 138 are electrically connected together by an interconnect structure.