Semiconductor device having high voltage lateral capacitor and manufacturing method thereof
摘要
說明書
In some embodiments, the S/D regions 160 are formed in the substrate 100 and along outer sidewalls of the spacers 150 beside the stacked structure 130. In certain embodiments, a channel region 145 is positioned in the substrate 100 (within the diffusion region 120) between the S/D regions 160 and under the stacked structure 130, and the S/D regions 160 are positioned beside the channel region 145. In some embodiments, the S/D regions 160 formed at both opposite sides of the stacked structure 130 are symmetric source and drain regions having the same doping concentration and the same extension width. In alternative embodiments, the S/D regions 160 formed at both opposite sides of the stacked structure 130 are asymmetric source and drain regions with different extension widths.
