One technical feature of the present invention which is advantageous over the prior art is that, according to the present invention, taking the embodiment shown in FIG. 2 as an example, when the high voltage device 200 operates, minority carriers of the hot carriers caused by high electric field (for example but not limited to holes in an N-type high voltage device) are absorbed by a minority carriers absorption channel which is provided by the deep well column 25, to avoid turning ON a parasitic transistor formed by the source 28, the body region 26, and the first high voltage well 22 turning ON. The current which may be formed by the minority carriers in the prior art is suppressed by the effect of the minority carriers absorption channel provided by the deep well column 25, and therefore the safe operation area (SOA) is increased to improve the performance of the high voltage device 200 is improved.

Please refer to FIG. 3 which shows a second embodiment of the present invention. FIG. 3 shows a schematic of a cross-section view of a high voltage device 300. As shown in FIG. 3, the high voltage device 300 includes a semiconductor layer 31′, a deep well 311, a buried layer 312, a first high voltage well 32, an isolation structure 33, a drift oxide region 34, a deep well column 35, a body region 36, a body contact 36′, a gate 37, a source 38, a drain 39, a first conductivity type well 311′, a first conductivity type contact 311″, a second high voltage well 312′, and a second conductivity type contact 312″.