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High voltage device and manufacturing method thereof

專利號
US10868115B2
公開日期
2020-12-15
申請人
RICHTEK TECHNOLOGY CORPORATION(TW Zhubei)
發(fā)明人
Tsung-Yi Huang; Chu-Feng Chen
IPC分類
H01L29/06; H01L29/66; H01L29/78; H01L21/762
技術(shù)領(lǐng)域
in,voltage,layer,contact,region,deep,well,type,top,drift
地域: Zhubei

摘要

A high voltage device includes: a semiconductor layer, an isolation region, a deep well, a buried layer, a first high voltage well, a first conductivity type well, a second high voltage well, a body region, a body contact, a deep well column, a gate, a source and a drain. The deep well column is located between the drain and a boundary of the conductive layer which is near the source in a channel direction. The deep well column is a minority carriers absorption channel, to avoid turning ON a parasitic transistor in the high voltage device.

說明書

This embodiment differs from the first embodiment in that, in the first embodiment, the drift oxide region 24 is a LOCOS structure, while in this embodiment, the drift oxide region 34 is a chemical vapor deposition (chemical vapor deposition, CVD) oxide region. The CVD oxide region is formed by a CVD process deposition step. CVD deposition is well known to a person having ordinary skill in the art, so the details thereof are not redundantly explained here.

Please refer to FIG. 4 which shows a third embodiment of the present invention. FIG. 4 shows a schematic of a cross-section view of a high voltage device 400. As shown in FIG. 4, the high voltage device 400 includes a semiconductor layer 41′, a deep well 411, a buried layer 412, a first high voltage well 42, an isolation structure 43, a drift oxide region 44, a deep well column 45, a body region 46, a body contact 46′, a gate 47, a source 48, a drain 49, a first conductivity type well 411′, a first conductivity type contact 411″, a second high voltage well 412′, and a second conductivity type contact 412″.

權(quán)利要求

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