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Silicon carbide semiconductor device and a method of manufacturing the silicon carbide semiconductor device

專利號(hào)
US10868122B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
FUJI ELECTRIC CO., LTD.(JP Kawasaki)
發(fā)明人
Takeshi Tawara; Koji Nakayama; Yoshiyuki Yonezawa; Hidekazu Tsuchida; Koichi Murata
IPC分類
H01L29/16; H01L29/868; H01L29/66
技術(shù)領(lǐng)域
layer,type,drift,lifetime,epitaxial,carbide,silicon,vanadium,region,in
地域: Kawasaki

摘要

During epitaxial growth of an n?-type drift layer having a uniform nitrogen concentration, vanadium is doped in addition to the nitrogen, whereby an n?-type lifetime reduced layer is selectively formed in the n?-type drift layer. The n?-type lifetime reduced layer is disposed at a depth that is more than 5 μm from a pn junction surface between a p-type anode layer and the n?-type drift layer in a direction toward a cathode side, and the n?-type lifetime reduced layer is disposed separated from the pn junction surface. Further, the n?-type lifetime reduced layer is disposed in a range from the pn junction surface to a depth that is ? times a thickness of the n?-type drift layer. A vanadium concentration of the n?-type lifetime reduced layer is 1/100 to ? of a nitrogen concentration of the n?-type lifetime reduced layer.

說(shuō)明書(shū)

CROSS REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2018-120289, filed on Jun. 25, 2018, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION 1. Field of the Invention

Embodiments of the invention relate to a silicon carbide semiconductor device and a method of manufacturing the silicon carbide semiconductor device.

2. Description of the Related Art

Conventionally, in a p-intrinsic-n (pin) diode, conductance modulation occurs due to carriers (holes and electrons) injected from a p-type anode layer and an n-type cathode layer into an n-type drift layer (I layer) during energization (during forward bias), whereby drift resistance of the carriers decreases in the n-type drift layer. Further, by increasing the carrier lifetime of the n-type drift layer, the holes injected from the p-type anode layer into the n-type drift layer accumulate in the n-type drift layer, thereby enabling an even lower ON resistance due to electrons being pulled from n-type cathode layer to the n-type drift layer by the holes.

權(quán)利要求

1
What is claimed is:1. A silicon carbide semiconductor device having a pn junction surface through which forward current flows, the silicon carbide semiconductor device comprising:a starting substrate;a first-conductivity-type epitaxial layer that is made of silicon carbide containing, as an impurity, a first element that is a dopant of a first conductivity type, and that includes, in the order recited, a first first-conductivity-type epitaxial layer disposed proximate to the starting substrate; a second first-conductivity-type epitaxial layer disposed on the first first-conductivity-type epitaxial layer; and a third first-conductivity-type epitaxial layer disposed on the second first-conductivity-type epitaxial layer; anda second-conductivity-type epitaxial layer that is made of silicon carbide containing a dopant of a second conductivity type and that has the pn junction surface provided between the second-conductivity-type epitaxial layer and the first-conductivity-type epitaxial layer so that minority carriers are supplied to the first-conductivity-type epitaxial layer,wherein the second first-conductivity-type epitaxial layer contains, as impurities, the first element and a second element, vanadium, that forms a recombination center therein, and is positioned at a first depth that is separated from and deeper than 5 μm from the pn junction surface in a direction toward the first first-conductivity-type epitaxial layer, and is disposed in a range from the pn junction surface to a second depth that is ? times a thickness of the first-conductivity-type epitaxial layer,wherein the third first-conductivity-type epitaxial layer contains more of the first element than does the second first-conductivity-type epitaxial layer due to a depth distribution of a first-conductivity-type doping concentration of the first-conductivity-type epitaxial layer; andwherein the second element of the second first-conductivity-type epitaxial layer has a concentration that ranges from 1/100 to ? of the concentration of the first element of the second first-conductivity-type epitaxial layer.2. The silicon carbide semiconductor device according to claim 1, wherein the third first-conductivity-type epitaxial layer does not contain the second element and has a carrier lifetime that is at least 10 μs.3. The silicon carbide semiconductor device according to claim 1, wherein the silicon carbide semiconductor device is any one of a PiN diode, a metal oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), and a gate turn-off (GTO) thyristor.4. A method of manufacturing the silicon carbide semiconductor device according to claim 1, the method comprising:applying a predetermined voltage between both surfaces of the first-conductivity-type epitaxial layer effective to cause a depletion layer in the first-conductivity-type epitaxial layer to spread; andobtaining a depth distribution of a first-conductivity-type doping concentration of the first-conductivity-type epitaxial layer, based on an amount of change in capacitance of the depletion layer.
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