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Semiconductor devices including field effect transistors and methods of forming the same

專利號(hào)
US10868125B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
Samsung Electronics Co., Ltd.
發(fā)明人
Mirco Cantoro; Zhenhua Wu; Krishna Bhuwalka; Sangsu Kim; Shigenobu Maeda
IPC分類
H01L29/267; H01L27/092; H01L27/088; H01L21/8234; H01L21/8238; H01L29/10; H01L29/16; H01L29/165; H01L21/02; H01L29/06
技術(shù)領(lǐng)域
doped,pattern,layer,graphene,may,buffer,ap2,ap1,patterns,active
地域: Suwon-si

摘要

A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a first buffer pattern on the substrate, a channel pattern on the first buffer pattern, a doped pattern between the first buffer pattern and the channel pattern, and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern includes graphene injected with an impurity.

說(shuō)明書(shū)

Exemplary embodiments in accordance with principles of inventive concepts may also provide semiconductor devices capable of easily providing semiconductor components that are formed of the same channel material and have conductivity types different from each other and methods of forming the same.

Exemplary embodiments in accordance with principles of inventive concepts may also provide semiconductor devices capable of easily providing semiconductor components that are formed of the same channel material and have threshold voltages different from each other and methods of forming the same.

In exemplary embodiments in accordance with principles of inventive concepts, a semiconductor device may include: an active pattern provided on a substrate; and a gate electrode provided on the active pattern and intersecting the active pattern. The active pattern may include: a first buffer pattern on the substrate; a channel pattern on the first buffer pattern; a doped pattern between the first buffer pattern and the channel pattern; and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern may include graphene injected with an impurity.

In exemplary embodiments in accordance with principles of inventive concepts, the doped pattern may have a conductivity type of a P-type or an N-type.

In exemplary embodiments in accordance with principles of inventive concepts, the doped pattern may provide extra carriers to the channel pattern.

In exemplary embodiments in accordance with principles of inventive concepts, an impurity concentration of the doped pattern may be higher than 1×106/cm2 and equal to or lower than 1×1012/cm2.

權(quán)利要求

1
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