FIG. 1A is a plan view illustrating a semiconductor device according to a first exemplary embodiment of the inventive concepts. FIGS. 1B and 1C are cross-sectional views taken along lines I-I′ and II-II′ of FIG. 1A, respectively. FIG. 1D is a cross-sectional view corresponding to the line II-II′ of FIG. 1A to illustrate a semiconductor device according to a modified embodiment of a first exemplary embodiment of the inventive concepts.
Referring to FIGS. 1A, 1B, and 1C, a device isolation layer ST may be provided on a substrate 100 to define an active pattern AP. The active pattern AP may have a bar, or elongated rectangular, shape extending in a first direction D1 when viewed from a plan view. Substrate 100 may be a semiconductor substrate formed of silicon, germanium, or silicon-germanium or may be a silicon-on-insulator (SOI) substrate, for example. The device isolation layer ST may include at least one of, for example, an oxide layer, a nitride layer, or an oxynitride layer.
