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Semiconductor devices including field effect transistors and methods of forming the same

專利號
US10868125B2
公開日期
2020-12-15
申請人
Samsung Electronics Co., Ltd.
發(fā)明人
Mirco Cantoro; Zhenhua Wu; Krishna Bhuwalka; Sangsu Kim; Shigenobu Maeda
IPC分類
H01L29/267; H01L27/092; H01L27/088; H01L21/8234; H01L21/8238; H01L29/10; H01L29/16; H01L29/165; H01L21/02; H01L29/06
技術(shù)領(lǐng)域
doped,pattern,layer,graphene,may,buffer,ap2,ap1,patterns,active
地域： Suwon-si

摘要

A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a first buffer pattern on the substrate, a channel pattern on the first buffer pattern, a doped pattern between the first buffer pattern and the channel pattern, and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern includes graphene injected with an impurity.

說明書

In exemplary embodiments in which a semiconductor component including the active pattern AP, the gate electrode GE and the source/drain regions 110 is an N-type metal-oxide-semiconductor (NMOS) field effect transistor, the second buffer pattern 106 may provide a tensile strain to the channel pattern 108. In some exemplary embodiments, the second buffer pattern 106 may be formed of Si1-xGex, and the channel pattern 108 may be formed of silicon (Si). In other embodiments, the second buffer pattern 106 may be formed of Si1-xGex, and the channel pattern 108 may be formed of Si1-yGey (where x>y). In still other exemplary embodiments, the second buffer pattern 106 may be formed of In1-xGaxAs, and the channel pattern 108 may be formed of In1-yGayAs (where x<y).

Alternatively, in exemplary embodiments in which the semiconductor component is a P-type MOS (PMOS) field effect transistor, the second buffer pattern 106 may provide a compressive strain to the channel pattern 108. In some exemplary embodiments, the second buffer pattern 106 may be formed of Si1-xGex, and the channel pattern 108 may be formed of germanium (Ge). In other exemplary embodiments, the second buffer pattern 106 may be formed of Si1-zGez, and the channel pattern 108 may be formed of Si1-wGew (where z<w). In still other exemplary embodiments, the second buffer pattern 106 may be formed of In1-zGazAs, and the channel pattern 108 may be formed of In1-wGawAs (where z>w).

權(quán)利要求

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