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Semiconductor devices including field effect transistors and methods of forming the same

專利號
US10868125B2
公開日期
2020-12-15
申請人
Samsung Electronics Co., Ltd.
發(fā)明人
Mirco Cantoro; Zhenhua Wu; Krishna Bhuwalka; Sangsu Kim; Shigenobu Maeda
IPC分類
H01L29/267; H01L27/092; H01L27/088; H01L21/8234; H01L21/8238; H01L29/10; H01L29/16; H01L29/165; H01L21/02; H01L29/06
技術(shù)領(lǐng)域
doped,pattern,layer,graphene,may,buffer,ap2,ap1,patterns,active
地域： Suwon-si

摘要

A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a first buffer pattern on the substrate, a channel pattern on the first buffer pattern, a doped pattern between the first buffer pattern and the channel pattern, and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern includes graphene injected with an impurity.

說明書

The portion of the graphene layer 124 exposed by the second opening 142 may be doped with an impurity IM using the second mask layer M2 as a doping mask. In this manner, in accordance with principles of inventive concepts, a second doped region r2 may be formed in the graphene layer 124. The second doped region r2 may be spaced apart from the first doped region r1 in the second direction D2. If the second doped region r2 has an N-type, the impurity IM may include, for example, halogen atoms such as nitrogen or fluorine. If the second doped region r2 has an P-type, the impurity IM may include, for example, boron. The conductivity type of the second doped region r2 may be different from that of the first doped region r1. That is, in accordance with principles of inventive concepts, if the first doped region r1 has the P-type, the second doped region r2 may be N-type. Doping the portion, exposed by the second opening 142, of the graphene layer 124 with the impurity IM may be as described with reference to FIGS. 10A and 10B.

Referring to FIGS. 12A and 12B, the second mask layer M2 may be removed after the formation of the second doped region r2. For example, the second mask layer M2 may be removed by an ashing process and/or a strip process. A second buffer layer 126, a channel layer 128, and a barrier layer 132 may be sequentially formed on the graphene layer 124 including the first and second doped regions r1 and r2.

權(quán)利要求

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