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Semiconductor devices including field effect transistors and methods of forming the same

專利號
US10868125B2
公開日期
2020-12-15
申請人
Samsung Electronics Co., Ltd.
發(fā)明人
Mirco Cantoro; Zhenhua Wu; Krishna Bhuwalka; Sangsu Kim; Shigenobu Maeda
IPC分類
H01L29/267; H01L27/092; H01L27/088; H01L21/8234; H01L21/8238; H01L29/10; H01L29/16; H01L29/165; H01L21/02; H01L29/06
技術領域
doped,pattern,layer,graphene,may,buffer,ap2,ap1,patterns,active
地域： Suwon-si

摘要

A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a first buffer pattern on the substrate, a channel pattern on the first buffer pattern, a doped pattern between the first buffer pattern and the channel pattern, and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern includes graphene injected with an impurity.

說明書

Referring to FIGS. 17A, 17B, and 17C, the first mask layer M1 may be removed after the formation of the first doped region r1. The first mask layer M1 may be removed by, for example, an ashing process and/or a strip process. Next, a second mask layer M2 may be formed on the graphene layer 124 including the first doped region r1. The second mask layer M2 may be a photoresist layer, for example. The second mask layer M2 may have a second opening 142 that exposes the graphene 124. The second opening 142 may extend in the first direction D1 and may expose a portion of the top surface of the graphene layer 124. The second opening 142 may be spaced apart from the first doped region r1 in a second direction D2 intersecting the first direction D1 when viewed from a plan view.

權利要求

1
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