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Semiconductor devices including field effect transistors and methods of forming the same

專(zhuān)利號(hào)
US10868125B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
Samsung Electronics Co., Ltd.
發(fā)明人
Mirco Cantoro; Zhenhua Wu; Krishna Bhuwalka; Sangsu Kim; Shigenobu Maeda
IPC分類(lèi)
H01L29/267; H01L27/092; H01L27/088; H01L21/8234; H01L21/8238; H01L29/10; H01L29/16; H01L29/165; H01L21/02; H01L29/06
技術(shù)領(lǐng)域
doped,pattern,layer,graphene,may,buffer,ap2,ap1,patterns,active
地域： Suwon-si

摘要

A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a first buffer pattern on the substrate, a channel pattern on the first buffer pattern, a doped pattern between the first buffer pattern and the channel pattern, and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern includes graphene injected with an impurity.

說(shuō)明書(shū)

Referring to FIG. 27, an electronic system 1100 according to an exemplary embodiment of inventive concepts may include a controller 1110, an input/output (I/O) unit 1120, a memory device 1130, an interface unit 1140, and a data bus 1150. At least two of the controller 1110, the I/O unit 1120, the memory device 1130, and the interface unit 1140 may communicate with each other through the data bus 1150. The data bus 1150 may correspond to a path through which electrical data are transmitted.

The controller 1110 may include at least one of a microprocessor, a digital signal processor, a microcontroller, or another logic device having a similar function to any one thereof. The I/O unit 1120 may include a keypad, a keyboard and/or a display device. The memory device 1130 may store data and/or commands. The interface unit 1140 may transmit electrical data to a communication network or may receive electrical data from a communication network. The interface unit 1140 may operate with or without a wired connection. For example, the interface unit 1140 may include an antenna for wireless communication or a transceiver for cable (or wired) communication. Although not shown in the drawings, the electronic system 1100 may further include a fast dynamic random access memory (DRAM) device and/or a fast static random access memory (SRAM) device which acts as a cache memory for improving an operation of the controller 1110. At least one semiconductor device in accordance with principles of inventive concepts may be provided in the memory device 1130 or may be provided to the controller 1110 and/or the I/O unit 1120.

權(quán)利要求

1
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