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Semiconductor device including standard cells with header/footer switch including negative capacitance

專利號
US10868132B2
公開日期
2020-12-15
申請人
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.(TW Hsinchu)
發(fā)明人
Chien-Hsing Lee; Chih-Sheng Chang; Wilman Tsai; Chia-Wen Chang; Ling-Yen Yeh; Carlos H. Diaz
IPC分類
H01L29/51; H01L29/66; H01L27/11; H01L27/092; H01L29/16; H01L29/40; H01L29/78
技術領域
fet,mos,nc,gate,dielectric,layer,fets,potential,switch,in
地域: Hsinchu

摘要

A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.

說明書

The ferroelectric negative capacitor NC of FIG. 1C can be a separate capacitor connected by a conductive layer (e.g., wire/contact) to the gate of the MOS FET, in some embodiments. In such a case, the negative capacitor has a first terminal (electrode) and a second terminal (electrode), and the first terminal is connected by a conductive element (e.g., wire) to a gate of the MOS FET. In other embodiments, one of the terminals of the negative capacitor NC is a gate electrode of the MOS FET. In such a case, the negative capacitor is formed within sidewall spacers of the MOS FET.

There are two types of NC FETs. FIG. 3A shows a cross sectional view of a metal-insulator-metal-insulator-semiconductor (MIMIS) FET-type NC FET and FIGS. 3B and 3C show cross sectional views of metal-insulator-semiconductor (MIS) FET-type NC FETs. Although FIGS. 3A-3C show NC FETs of a planar MOS transistor structure, fin FETs and/or gate-all-around FETs can be employed.

As shown in FIG. 3A, an MIMIS NC FET includes a substrate 200, a channel 201 and source and drain 202. The source and drain 202 are appropriately doped with impurities. Further, the source and drain and the channel (active regions) are surrounded by an isolation insulating layer, such as shallow trench isolation (STI), made of, for example, silicon oxide.

權利要求

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