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Semiconductor device including standard cells with header/footer switch including negative capacitance

專利號(hào)
US10868132B2
公開日期
2020-12-15
申請(qǐng)人
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.（TW Hsinchu）
發(fā)明人
Chien-Hsing Lee; Chih-Sheng Chang; Wilman Tsai; Chia-Wen Chang; Ling-Yen Yeh; Carlos H. Diaz
IPC分類
H01L29/51; H01L29/66; H01L27/11; H01L27/092; H01L29/16; H01L29/40; H01L29/78
技術(shù)領(lǐng)域
fet,mos,nc,gate,dielectric,layer,fets,potential,switch,in
地域： Hsinchu

摘要

A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.

說明書

FIGS. 9A, 9B and 9C show circuit diagrams using an MIMIS type NC FET according to embodiments of the present disclosure, and FIGS. 9D, 9E and 9F show circuit diagrams using an MIS type NC FET according to embodiments of the present disclosure.

In FIGS. 9A and 9D, an MIMIS type NC FET or an MIS type NC FET is used as a header switch HS. As the header switch, a p-type NC FET is used in some embodiments. In FIGS. 9B and 9E, an MIMIS type NC FET or an MIS type NC FET is used as a footer switch FS. As the footer switch, an n-type NC FET is used in some embodiments. FIGS. 9C and 9F show embodiments in which both header switch HS and footer switch FS are configured by an MIMIS type NC FET or an MIS type NC FET.

FIGS. 10A and 10B show circuit diagrams according to embodiments of the present disclosure.

權(quán)利要求

1
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