In accordance with another aspect of the present disclosure, a semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and a switch disposed between the second potential supply line and the functional circuit. The switch includes a MOS FET and a negative capacitor showing a negative capacitance and having a first terminal and a second terminal, and the first terminal is electrically coupled to a gate of the MOS FET. In one or more of the foregoing and/or following embodiments, the first terminal of the negative capacitor is a gate electrode of the MOS FET. In one or more of the foregoing and/or following embodiments, the negative capacitor further includes a capacitor dielectric layer disposed between the first terminal and the second terminal, and the capacitor dielectric layer is a ferroelectric material including one or more selected from the group consisting of ZrO₂, ZrAlSiO, HfO₂, HfZrO₂, HfO₂ doped with Zr (HfZrO_x), HfO₂ doped with Al (HfAlO_x), and HfO₂ doped with Si (HfSiO_x). In one or more of the foregoing and/or following embodiments, a thickness of the capacitor dielectric layer is in a range from 1.0 nm to 10 nm. In one or more of the foregoing and/or following embodiments, the functional circuit includes a logic circuit. In one or more of the foregoing and/or following embodiments, the functional circuit includes a memory. In one or more of the foregoing and/or following embodiments, the functional circuit includes an internal potential supply line to which drains of a plurality of MOS FETs of the functional circuit are coupled, and a source of the MOS FET of the switch is coupled to the internal potential supply line and a drain of the MOS FET of the switch is coupled to the first potential supply line.