Minimization of power consumption in a semiconductor device, such as an integrated circuit (IC), is a critical issue for semiconductor devices for high speed operations of and/or semiconductor device for mobile terminals. Various technologies to reduce the power consumption have been proposed, but many of them require a larger chip area due to additional circuitry for controlling power. One such technology includes adding a header switch and/or a footer switch between a power supply line(s) and a functional circuit. For example, a p-type MOS FET can be used as a header switch and an n-type MOS can be used as a footer switch to shut off the power supply to the functional circuit. The power consumption is reduced by turning-off the header/footer switch coupled to a non-active functional circuit in the semiconductor device.

In this disclosure, a header switch is a switch disposed between a first potential supply line (Vdd) and the functional circuit such as a logic circuit and/or a memory circuit. When the functional circuit includes an internal potential supply line (bus line), the header switch is disposed between the first potential supply line (Vdd) and the internal potential supply line. Similarly, a footer switch is a switch disposed between a second potential supply line (Vss) and the functional circuit. When the functional circuit includes an internal potential supply line (bus line), the header switch is disposed between the second potential supply line (Vss) (e.g., the ground) and the internal potential supply line.