For the MOS FET portion, the sub-threshold swing is expressed by equation (3), where VG is the applied gate bias, Ψs is the surface potential, Cs is the semiconductor capacitance, and Cins is equal to the gate insulator capacitance Cox. The “1+Cs/Cins” is larger than 1, and therefore the limit Swing dictated by Boltzmann distribution is about 60 mV/dec at room temperature.