Still referring to FIG. 3, at operation 16, the method 10 (FIG. 1) forms a gate spacer 122 over sidewalls of the dummy gate stack 120. This may involve one or more deposition and etching processes. In one embodiment, a spacer is formed on the sidewalls of both the dummy gate stack 120 and the fin 110, and then it is removed from the sidewalls of the fin 110, leaving only the portion on the sidewalls of the dummy gate stack 120. As an example, a spacer material may be deposited as a blanket over the isolation structure 112, the fin 110, and the dummy gate stack 120. Then the spacer material is etched by an anisotropic etching process to expose the isolation structure 112, the hard mask layer 118, and a top surface of the fin 110. As a result, only portions of the spacer material on the sidewalls of the dummy gate stack 120 and the sidewalls of the fin 110 remain. The portion of the spacer material on the sidewalls of the dummy gate stack 120 is referred to as the gate spacer 122. In embodiments, the spacer material may comprise a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, other dielectric material, or combinations thereof. Furthermore, the gate spacer 122 may comprise one or multiple layers of material.