白丝美女被狂躁免费视频网站,500av导航大全精品,yw.193.cnc爆乳尤物未满,97se亚洲综合色区,аⅴ天堂中文在线网官网

Source and drain surface treatment for multi-gate field effect transistors

專利號
US10868149B2
公開日期
2020-12-15
申請人
Taiwan Semiconductor Manufacturing Co., Ltd.(TW Hsinchu)
發(fā)明人
Wei-Han Fan; Wei-Yuan Lu; Yu-Lin Yang; Chun-Hsiang Fan; Sai-Hooi Yeong
IPC分類
H01L29/66; H01L29/08; H01L21/02; H01L21/265; H01L21/3065; H01L29/78; H01L21/225; H01L21/311; H01L21/306
技術(shù)領(lǐng)域
fin,in,gate,layer,etching,drain,isolation,liner,silicon,channel
地域: Hsin-Chu

摘要

A method includes providing a structure having a substrate and a fin extending from the substrate, wherein the fin includes a first semiconductor material and has a source region, a channel region, and a drain region for a transistor; forming a gate stack over the channel region; performing a surface treatment to the fin in the source and drain regions, thereby converting an outer portion of the fin in the source and drain regions into a different material other than the first semiconductor material; etching the converted outer portion of the fin in the source and drain regions, thereby reducing a width of the fin in the source and drain regions; and depositing an epitaxial layer over the fin in the source and drain regions.

說明書

The conductive layer 116a may include one or more metal layers, such as work function metal layer(s), conductive barrier layer(s), and metal fill layer(s). The work function metal layer may be a p-type or an n-type work function layer depending on the type (p-type or n-type) of the transistor. The p-type work function layer comprises a metal selected from but not restricted to the group of titanium nitride (TiN), tantalum nitride (TaN), ruthenium (Ru), molybdenum (Mo), tungsten (W), platinum (Pt), or combinations thereof. The n-type work function layer comprises a metal selected from but not restricted to the group of titanium (Ti), aluminum (Al), tantalum carbide (TaC), tantalum carbide nitride (TaCN), tantalum silicon nitride (TaSiN), titanium silicon nitride (TiSiN), or combinations thereof. The metal fill layer may include aluminum (Al), tungsten (W), cobalt (Co), and/or other suitable materials. The conductive layer 116a may be deposited using methods such as CVD, PVD, plating, and/or other suitable processes.

At operation 30, the method 10 (FIG. 1) performs further steps to complete the fabrication of the device 100. For example, operation 30 may form a gate contact electrically connecting the gate stack 120a, and may form metal interconnects connecting the multi-gate FET to other portions of the device 100 to form a complete IC.

權(quán)利要求

1
微信群二維碼
意見反饋