In yet another exemplary aspect, the present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate; a dielectric layer covering the substrate; a fin extending from the substrate and through the dielectric isolation layer, the fin including a first semiconductor material, the fin having a source/drain (S/D) region and a channel region, the S/D region providing a top surface and two sidewall surfaces, wherein a width of the S/D region is smaller than a width of the channel region; an epitaxial layer covering the S/D region; and a dielectric liner surrounding a bottom portion of the fin, wherein the dielectric liner has a lower portion below a top surface of the dielectric isolation layer and an upper portion above the top surface of the dielectric isolation layer. In an embodiment, a height of the S/D region is smaller than a height of the channel region. In an embodiment, a portion of the epitaxial layer extends into the channel region. In an embodiment, the first semiconductor material includes silicon germanium.

The foregoing outlines features of several embodiments so that those of ordinary skill in the art may better understand the aspects of the present disclosure. Those of ordinary skill in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those of ordinary skill in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.