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Source and drain surface treatment for multi-gate field effect transistors

專利號(hào)
US10868149B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
Taiwan Semiconductor Manufacturing Co., Ltd.(TW Hsinchu)
發(fā)明人
Wei-Han Fan; Wei-Yuan Lu; Yu-Lin Yang; Chun-Hsiang Fan; Sai-Hooi Yeong
IPC分類
H01L29/66; H01L29/08; H01L21/02; H01L21/265; H01L21/3065; H01L29/78; H01L21/225; H01L21/311; H01L21/306
技術(shù)領(lǐng)域
fin,in,gate,layer,etching,drain,isolation,liner,silicon,channel
地域: Hsin-Chu

摘要

A method includes providing a structure having a substrate and a fin extending from the substrate, wherein the fin includes a first semiconductor material and has a source region, a channel region, and a drain region for a transistor; forming a gate stack over the channel region; performing a surface treatment to the fin in the source and drain regions, thereby converting an outer portion of the fin in the source and drain regions into a different material other than the first semiconductor material; etching the converted outer portion of the fin in the source and drain regions, thereby reducing a width of the fin in the source and drain regions; and depositing an epitaxial layer over the fin in the source and drain regions.

說(shuō)明書

The fin 110 may comprise at least a semiconductor material selected from the group consisting of silicon, silicon-germanium (Si1-xGex), germanium, and III-V compound semiconductors such as gallium arsenide, indium gallium arsenide (InmGa1-mAs), indium arsenide, indium phosphide, and indium antimonide. The fin 110 may comprise strained Si1-xGex formed on Si, or strained Si formed on relaxed silicon-germanium. In an embodiment, the fin 110 comprises strained Si1-xGex and the substrate 102 comprises a relaxed or partially relaxed silicon germanium alloy Si1-rGer layer, where the germanium mole fraction r is smaller than x. By selecting x to be larger than r, the natural lattice constant of the Si1-xGex channel is larger than that of Si1-rGer, and the Si1-xGex channel is under compressive stress or strain. In embodiments, the compressive strain in the channel in the longitudinal direction is larger than 0.5%, such as larger than 1%. In embodiments, the substrate 102 may also comprise a silicon oxide (SiO2) layer (i.e. silicon-on-insulator substrate), and the fin 110 may be formed from a silicon-on-insulator wafer. In the illustrated embodiment, the fin sidewall surfaces are of (110) crystal orientation and the fin top surface is of (100) crystal orientation. The fin sidewall surfaces may be of other crystal orientations such as (551). Other configurations and shapes of the fin 110 are possible and are within the scope of the present disclosure.

權(quán)利要求

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