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Conformal transfer doping method for fin-like field effect transistor

專(zhuān)利號(hào)
US10868151B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
Taiwan Semiconductor Manufacturing Co., Ltd.(TW Hsinchu)
發(fā)明人
Sai-Hooi Yeong; Sheng-Chen Wang; Bo-Yu Lai; Ziwei Fang; Feng-Cheng Yang; Yen-Ming Chen
IPC分類(lèi)
H01L21/265; H01L29/66; H01L21/225; H01L29/165
技術(shù)領(lǐng)域
doped,fin,finfet,amorphous,layer,fins,in,structure,knock,silicon
地域: Hsinchu

摘要

Doping techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes forming a fin structure, forming a doped amorphous layer over a portion of the fin structure, and performing a knock-on implantation process to drive a dopant from the doped amorphous layer into the portion of the fin structure, thereby forming a doped feature. The doped amorphous layer includes a non-crystalline form of a material. In some implementations, the knock-on implantation process crystallizes at least a portion of the doped amorphous layer, such that the portion of the doped amorphous layer becomes a part of the fin structure. In some implementations, the doped amorphous layer includes amorphous silicon, and the knock-on implantation process crystallizes a portion of the doped amorphous silicon layer.

說(shuō)明書(shū)

Each fin 222 has a height h, a width w1 defined by a pair of sidewalls, and a length l defined by a pair of sidewalls (not shown in the depicted view). Adjacent fins 222 are separated by a space S1, where a pitch P of fins 222 generally refers to a sum of a width of a particular fin 222 (such as w1) and a width of a space adjacent to the particular fin 222 (such as S1) (in other words, P=w1+S1). In some implementations, pitch P is a minimum pitch achievable between fins 222 by a lithography process for a given technology node. In some implementations, height h is about 30 nm to about 80 nm, and width w1 is about 1 nm to about 30 nm. For example, in the depicted embodiment, height h is about 30 nm to about 80 nm, and width w1 is about 2 nm to about 20 nm. In some implementations, space S1 is about 10 nm to about 30 nm. In some implementations, pitch P is about 10 nm to about 50 nm. The present disclosure contemplates variations in height h, width w1, and length l of fins 222 that may arise from processing and fabrication of FinFET device 200. For example, though each fin 222 is depicted as having substantially the same width w1 along height h, in some implementations, width w1 represents an average width of a given fin 222. In some implementations, a width of fins 222 varies from an upper portion of fins 222 to a lower portion of fins 222, where width w1 represents an average of the varying widths. In some implementations, the width tapers from the upper portion of fins 222 to the lower portion of fins 222, such that an average width of the upper portion is less than an average width of the lower portion. In some implementations, width w1 can vary from about 5 nm to about 15 nm along fins 222 depending on where width w1 is measured along height h of fins 222. In some implementations, width w1 of fins 222 varies depending on a position of fins 222 relative to one another and/or relative to other features of FinFET device 200. For example, width w1 of center fins 222 (in the depicted embodiment, FinFET device 200 includes two center fins 222) may be greater than width w1 of edge fins 222 (here, the leftmost fin 222 and the rightmost fin 222, which enclose the two center fins 222). In another example, alternatively, width w1 of center fins 222 is less than width w1 of edge fins 222. In both such implementations, width w1 of edge fins 222 can represent an average width of edge fins 222, and width w1 of center fins 222 can represent an average width of center fins 222.

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