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Conformal transfer doping method for fin-like field effect transistor

專利號(hào)
US10868151B2
公開日期
2020-12-15
申請(qǐng)人
Taiwan Semiconductor Manufacturing Co., Ltd.(TW Hsinchu)
發(fā)明人
Sai-Hooi Yeong; Sheng-Chen Wang; Bo-Yu Lai; Ziwei Fang; Feng-Cheng Yang; Yen-Ming Chen
IPC分類
H01L21/265; H01L29/66; H01L21/225; H01L29/165
技術(shù)領(lǐng)域
doped,fin,finfet,amorphous,layer,fins,in,structure,knock,silicon
地域: Hsinchu

摘要

Doping techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes forming a fin structure, forming a doped amorphous layer over a portion of the fin structure, and performing a knock-on implantation process to drive a dopant from the doped amorphous layer into the portion of the fin structure, thereby forming a doped feature. The doped amorphous layer includes a non-crystalline form of a material. In some implementations, the knock-on implantation process crystallizes at least a portion of the doped amorphous layer, such that the portion of the doped amorphous layer becomes a part of the fin structure. In some implementations, the doped amorphous layer includes amorphous silicon, and the knock-on implantation process crystallizes a portion of the doped amorphous silicon layer.

說明書

Doped amorphous layer 230 is formed by a suitable deposition process, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), high density plasma CVD (HDPCVD), metal organic CVD (MOCVD), remote plasma CVD (RPCVD), plasma enhanced CVD (PECVD), low-pressure CVD (LPCVD), atomic layer CVD (ALCVD), atmospheric pressure CVD (APCVD), spin coating, plating, other deposition method, or combinations thereof. In the depicted embodiment, doped amorphous layer 230 is conformally deposited over fin structure 220, such that thickness t is substantially uniform over exposed surfaces of fin structure 220 and/or substrate 210. Any suitable process (for example, an ion implantation process, a diffusion process, an in-situ doping process, or combinations thereof) can be implemented for doping the material deposited over the fin structure 220. In some implementations, a selective epitaxial growth (SEG) process is performed to grow a semiconductor material on exposed portions of fin structure 220, where dopants are introduced into the semiconductor material during the SEG process (for example, by adding dopants to a source material of the SEG process), thereby forming doped amorphous layer 230. The SEG process can implement CVD deposition techniques (for example, vapor-phase epitaxy (VPE), ultra-high vacuum CVD (UHV-CVD), LPCVD, and/or PECVD), molecular beam epitaxy, other suitable SEG processes, or combinations thereof. The SEG process can use gaseous precursors (for example, silicon-containing gases, such as SiH4 and/or germanium-containing gases, such as GeH4) and/or liquid precursors, which interact with a composition of fin structure 220. For example, in the depicted embodiment, where doped amorphous layer 230 is a doped amorphous silicon layer, the deposition process can expose fin structure 220 (and substrate 210) to a silicon-containing gas (for example, a silicon hydride containing gas (such as SiH4, Si2H6, Si3H8, Si4H10, or combinations thereof)) and add dopants (for example, germanium, boron, arsenic, phosphorous, or combinations thereof) to the silicon-containing gas. In some implementations, doped amorphous layer 230 includes materials and/or dopants that achieve desired tensile stress and/or compressive stress in a channel region of FinFET device 200.

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