After forming gate structure 410, lightly doped source and drain (LDD) features 450 are formed in source region 404 and drain region 406 of FinFET device 400. LDD features 450 are similar to doped feature 250 of FinFET device 200, which is described in detail above with reference to FIGS. 2A-2E. For example, a doped amorphous layer is formed over source region 404 and drain region 406 of fins 222, and a knock-on implantation process is performed on the doped amorphous layer to drive dopant from the doped amorphous layer into source region 404 and drain region 406. The knock-on implantation process also converts the doped amorphous layer into a portion of fins 222, such that LDD features 450 include a doped portion of fins 222 and converted (re-crystallized) doped amorphous layer. In some implementations (such as the depicted embodiment), a fin trimming process, such as described above, is performed before forming isolation feature 420 and/or gate structure 410. Alternatively, in some implementations, the fin trimming process is performed after forming the isolation feature 420 and/or gate structure 410, such that the a width of a top portion of fins 222 (such as a portion of fins 222 extending above isolation feature 420) is less than a width of a bottom portion of fins 222. Thereafter, FinFET device 400 can undergo subsequent fabrication, as described below.