The degree and shape of undercut illustrated by exemplary lower surface portion 52 is intended to be exemplary only and produces a stress in the etched surfaces. The undercut produces mesa 72 having a minimum width 74 that is less than width 82 of corresponding transistor gate 8. The curved surfaces of lower surface portions 52 of sidewalls 46 of openings 44 extend laterally inward past dashed line 48 indicating the lateral edge of transistor structure 2 and also inwardly past dashed line 76 representing sidewalls 20 of transistor gate 8. Lower surface portions 52 extend laterally inward by distance 80 with respect to the outer edges of transistor gate 8 indicated by sidewalls 20, i.e. opening 44 undercuts transistor gate 8 by distance 80 on each side. According to one exemplary embodiment, distance 80 may vary from about 5-15 nanometers, but other degrees of undercut may be produced according to other exemplary embodiments. Minimum width 74 of mesa 72 may therefore be about 10-30 nanometers less than width 82 of transistor gate 8. Such is intended to be exemplary only.