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Highly strained source/drain trenches in semiconductor devices

專利號(hào)
US10868166B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
Ta-Wei Kao; Shiang-Bau Wang; Ming-Jie Huang; Chi-Hsi Wu; Shu-Yuan Ku(TW Hsin-Chu)
發(fā)明人
Ta-Wei Kao; Shiang-Bau Wang; Ming-Jie Huang; Chi-Hsi Wu; Shu-Yuan Ku
IPC分類
H01L29/76; H01L29/78; H01L29/66
技術(shù)領(lǐng)域
transistor,etch,sccm,overetch,silicon,opening,substrate,br,undercut,etching
地域: Sijhih

摘要

A semiconductor device is formed by a multi-step etching process that produces trench openings in a silicon substrate immediately adjacent transistor gate structures formed over the substrate surface. The multi-step etching process is a Br-based etching operation with one step including nitrogen and a further step deficient of nitrogen. The etching process does not attack the transistor structure and forms the openings. The openings are bounded by upper surfaces that extend downwardly from the substrate surface and are substantially vertical, and lower surfaces that bulge outwardly from the upper vertical sections and undercut the transistor structure. The openings may be filled with a suitable source/drain material to produce SSD transistors with desirable Idsat characteristics.

說(shuō)明書(shū)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

The conventional etching procedure used to produce the structure shown in FIG. 1B from the structure shown in FIG. 1A may include a silicon nitride main etch step followed by a silicon nitride overetch step. Various etching parameters and etching procedures may be used for each of the silicon nitride main etch and overetch operations. According to one exemplary embodiment, the silicon nitride main etch step may use the following gas constituents: 75 sccm CF4, 75 sccm HBr and 13 sccm HeO2, various suitable pressures, powers and biases, and an etch time that may vary according to the thickness of the film being removed. Such gas flow parameters are intended to be exemplary only. According to various exemplary embodiments, the silicon nitride main etch may include gas flows in the following ranges: 50-100 sccm CF4, 50-100 sccm HBr and 5-20 sccm HeO2. The silicon nitride overetch, according to one exemplary embodiment, may include gas flows of about 100 sccm CH3F, about 60 sccm O2 and about 120 sccm He but other values may be used in other exemplary embodiments. The silicon nitride overetch may include various suitable pressures, power, and bias voltages and may include gas flows within the ranges of about 50-150 sccm CH3F, about 40-90 sccm O2 and about 80-160 sccm He. Such is intended to be exemplary only. Other conventional methods for forming sidewall spacers 18 from SiN film 10 may be used in other exemplary embodiments.

Sidewall spacers 18 disposed adjacent respective sidewalls 20 of transistor gate 8 include outer surfaces 22. Transistor structures 2 are then used as self-aligned masks to etch openings into exposed portions 26 of substrate 6.

權(quán)利要求

1
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