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Vertical power devices with oxygen inserted Si-layers

專利號
US10868172B2
公開日期
2020-12-15
申請人
Infineon Technologies Austria AG(AT Villach)
發(fā)明人
Oliver Blank; Thomas Feil; Maximilian Roesch; Martin Poelzl; Robert Haase; Sylvain Leomant; Bernhard Goller; Andreas Meiser
IPC分類
H01L29/78; H01L21/76; H01L21/02; H01L21/3063; H01L21/768; H01L29/08; H01L29/10; H01L29/66
技術(shù)領(lǐng)域
trench,si,diffusion,doped,contact,barrier,oxygen,region,body,layers
地域: Villach

摘要

A semiconductor device includes: a gate trench extending into a Si substrate; a body region in the Si substrate, the body region including a vertical channel region adjacent a sidewall of the gate trench; a source region in the Si substrate above the body region; a contact trench extending into the Si substrate and separated from the gate trench by a portion of the source region and by a portion of the body region; an electrically conductive material in the contact trench; and a diffusion barrier structure interposed between a sidewall of the contact trench and the vertical channel region, the diffusion barrier structure including alternating layers of Si and oxygen-doped Si and configured to increase carrier mobility within the vertical channel region. Corresponding methods of manufacture are also described.

說明書

FIG. 5A shows the semiconductor device 500 after the diffusion barrier structure 132 is formed on the sidewall and bottom of the contact trench 124, e.g., as previously described herein in connection with FIG. 2C. A conformal spacer oxide 502 is also deposited on the capping layer 140 of Si of the diffusion barrier structure 132. If the capping layer 140 is omitted, the conformal spacer oxide 502 is deposited directly on the uppermost one of the alternating layers of Si 134 and oxygen-doped Si 136 of the diffusion barrier structure 132. In either case, any standard conformal spacer oxide may be used such as, e.g., silicon oxide.

FIG. 5B shows the semiconductor device 500 during anisotropic etching of the conformal spacer oxide 502 from the top to expose the diffusion barrier structure 132 at the bottom of the contact trench 124. The anisotropic etching is represented by the downward facing arrows in FIG. 5B. If the capping layer 140 of Si is provided, the capping layer 140 would be exposed at the bottom of the contact trench 124. Otherwise, the uppermost one of the alternating layers of Si 134 and oxygen-doped Si 136 would be exposed. Any standard dielectric anisotropic etching process may be used to remove the conformal spacer oxide 502 from the bottom of the contact trench 124.

權(quán)利要求

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