Semiconductor device having an edge termination area with trench electrodes at different electric potentials, and method for manufacturing thereof
地域：
Villach
摘要
A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.
說(shuō)明書(shū)
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Embodiments described herein relate to semiconductor devices having a surface doping region with a reduced net doping concentration relative to a net doping concentration of an upper drift region of a drift region. Further embodiments pertain to methods for manufacturing semiconductor devices.
Semiconductor devices such as MOSFET using field electrodes for charge compensation have become very popular during the last decade as they offer a significant improvement of the area-specific resistance. The devices typically use a stripe design where the field electrodes and the mesa regions containing the gate electrodes are formed in the shape of long stripes which run parallel to each other.
More recent concepts employ a cell design having a hole-like deep trench, also referred to as spicular trench, containing the so-called field-plate in the centre of a given transistor cell. The deep trench containing the field-plate is surrounded by a separate gate trench. This cell design, also referred to as needle trench design due to the central deep field-plate shaped as oblong electrode, offers a larger cross-sectional area for the mesa region around the spicular trench than the stripe design. A larger cross-sectional area for the mesa is believed to further reduce the overall on-state resistance RON of the semiconductor device.
權(quán)利要求
What is claimed is:1. A semiconductor device, comprising:a semiconductor substrate having a first side, a second side opposite to the first side, a lateral rim, an active area, an edge termination area arranged between the active area and the lateral rim of the semiconductor substrate, a drift region of a first conductivity type and a body region of a second conductivity type, the drift region comprising an upper drift region and a lower drift region, wherein the active area comprises at least portions of the body region and a plurality of spicular trenches each comprising a field electrode and extending from the first side through the body region and into the drift region, each of the spicular trenches in the active area comprising a lower end, the lower ends together defining a lower end of the upper drift region extending towards the first side, the lower drift region extending from the lower end of the upper drift region towards the second side, wherein the edge termination area comprises a plurality of termination trenches extending from the first side at least into the upper drift region, wherein the drift region has a surface doping region arranged in the upper drift region in the edge termination area and extending to the first side, wherein the surface doping region is spaced apart from the lower end of the upper drift region and has a net doping concentration lower than a net doping concentration of the upper drift region, wherein the surface doping region has a net conductivity type of the first conductivity type, wherein a first group of electrodes included in the termination trenches are electrically connected to source potential and a second group of electrodes included in the termination trenches are electrically floating. 2. The semiconductor device of claim 1 , wherein the plurality of termination trenches comprises a plurality of spicular trenches in the edge termination area extending from the first side into the upper drift region. 3. The semiconductor device of claim 1 , wherein the net doping concentration of the upper drift region is at least 1·1015/cm3. 4. The semiconductor device of claim 1 , wherein the net doping concentration of the surface doping region is equal to or lower than 80% of the net doping concentration of the upper drift region. 5. The semiconductor device of claim 1 , wherein the drift region extends in the edge termination area to the first side. 6. The semiconductor device of claim 1 , further comprising gate trenches in the active area adjacent to respective spicular trenches, the gate trenches extending from the first side through the body region, wherein each of the gate trenches comprises a gate electrode electrically insulated from the adjacent body region, wherein the spicular trenches extends deeper into the semiconductor substrate than the gate trenches. 7. The semiconductor device of claim 6 , wherein at least some of the spicular trenches in the active area are at least partially laterally surrounded by a respective gate trench. 8. The semiconductor device of claim 1 , further comprising at least one of a gate runner and a source runner arranged in the edge termination area. 9. The semiconductor device of claim 1 , wherein the spicular trenches are arranged in a staggered pattern. 10. The semiconductor device of claim 1 , wherein the surface doping region laterally completely extends from an outer end of the active area to the lateral rim of the semiconductor substrate. 11. The semiconductor device of claim 1 , wherein the surface doping region is only formed in an outer part of the edge termination area extending to the lateral rim, and wherein the upper drift region extends to the first side in an inner part of the edge termination area next to the active area. 12. The semiconductor device of claim 1 , wherein the second group of electrodes included in the termination trenches are electrically connected to a floating region of the second conductivity type formed in the edge termination area. 13. The semiconductor device of claim 1 , wherein selected areas of the semiconductor substrate are counter doped with dopants of the second conductivity type. 14. A method for manufacturing a semiconductor device, the method comprising:providing a semiconductor base substrate; forming an epitaxial layer on the semiconductor base substrate, the epitaxial layer and the semiconductor base substrate forming together a semiconductor substrate; forming a drift region comprising a surface doping region of a first conductivity type and an upper drift region of the first conductivity type in the epitaxial layer, the surface doping region having a net doping concentration lower than a net doping concentration of the upper drift region; forming a body region of a second conductivity type in an active area; forming, in the active area, a plurality of spicular trenches extending from a first side through the body region and into the drift region; forming, in an edge termination area, a plurality of termination trenches extending from the first side into the upper drift region; electrically connecting a first group of electrodes included in the termination trenches to source potential; and electrically connecting a second group of electrodes included in the termination trenches to a floating region of the second conductivity type formed in the edge termination area. 15. The method of claim 14 , further comprising:forming gate trenches in the active area adjacent to respective spicular trenches, the gate trenches extending from the first side through the body region, wherein each of the gate trenches comprises a gate electrode electrically insulated from the adjacent body region, wherein the spicular trenches extends deeper into the semiconductor substrate than the gate trenches. 16. The method of claim 14 , wherein at least some of the spicular trenches in the active area are at least partially laterally surrounded by a respective gate trench. 17. The method of claim 14 , wherein forming the drift region comprises:supplying a doping gas during formation of the epitaxial layer; and reducing the supply of the doping gas to form the surface doping region when the epitaxial layer has reached a predetermined thickness. 18. The method of claim 14 , wherein forming the drift region comprises:supplying a doping gas during formation of the epitaxial layer; and stopping the supply of the doping gas to form the surface doping region when the epitaxial layer has reached a predetermined thickness. 19. The method of claim 14 , wherein forming the drift region comprises:supplying a doping gas during formation of the epitaxial layer at a substantially constant supply rate; and after forming the epitaxial layer, implanting counter dopants into the epitaxial layer to reduce the net doping concentration at a surface of the epitaxial layer to form the surface doping region. 20. The method of claim 19 , wherein implanting counter dopants comprises:forming an implantation mask on the surface of the epitaxial layer to cover the active area and to expose the edge termination area; and after forming the implantation mask, implanting the counter dopants into the epitaxial layer. 21. A semiconductor device, comprising:a semiconductor substrate having a first side, a second side opposite to the first side, a lateral rim, an active area, an edge termination area arranged between the active area and the lateral rim of the semiconductor substrate, a drift region of a first conductivity type and a body region of a second conductivity type, the drift region comprising an upper drift region and a lower drift region; and counter dopants disposed in the upper drift region in the edge termination area, the counter dopants having an opposite conductivity type as the drift region and reducing a net doping concentration of the upper drift region at the first side of the semiconductor substrate to form a surface doping region in the edge termination area, the surface doping region having a net conductivity type of the first conductivity type, wherein the active area comprises at least portions of the body region and a plurality of spicular trenches each comprising a field electrode and extending from the first side through the body region and into the drift region, each of the spicular trenches in the active area comprising a lower end, the lower ends together defining a lower end of the upper drift region extending towards the first side, the lower drift region extending from the lower end of the upper drift region towards the second side, wherein the edge termination area comprises a plurality of spicular termination trenches extending from the first side at least into the upper drift region, wherein the surface doping region is spaced apart from the lower end of the upper drift region, wherein a first group of electrodes included in the spicular termination trenches are electrically connected to source potential and a second group of electrodes included in the spicular termination trenches are electrically floating. 22. The semiconductor device of claim 21 , wherein the surface doping region laterally completely extends from an outer end of the active area to the lateral rim of the semiconductor substrate. 23. The semiconductor device of claim 21 , wherein the surface doping region is only formed in an outer part of the edge termination area extending to the lateral rim, and wherein the upper drift region extends to the first side in an inner part of the edge termination area next to the active area. 24. The semiconductor device of claim 21 , wherein the second group of electrodes included in the spicular termination trenches are electrically connected to a floating region of the second conductivity type formed in the edge termination area. 25. The semiconductor device of claim 21 , wherein selected areas of the semiconductor substrate are counter doped with dopants of the second conductivity type.
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