The one or more optional conformal layers 224 can include one or more barrier and/or capping layers and one or more work-function tuning layers. The one or more barrier and/or capping layers can include tantalum nitride, titanium nitride, the like, or a combination thereof. The one or more work-function tuning layer may include or be aluminum titanium carbide, aluminum titanium oxide, aluminum titanium nitride, the like, or a combination thereof. The materials for the one or more work-function tuning layer, the barrier layer and/or capping layer are selected so that a desired threshold voltage (Vt) is achieved for the transistor, which could be a p-type field effect transistor (pFET) or an n-type field effect transistor (nFET). A gate fill conductive material 226 is formed over the one or more conformal layers 224, if implemented, and/or the gate dielectric layer 222. The gate fill conductive material 226 can fill remaining recesses where the dummy gate structures 251 were removed. The gate fill conductive material 226 may be or include a metal-containing material such as tungsten, cobalt, aluminum, ruthenium, copper, multi-layers thereof, a combination thereof, or the like.

A planarization process, like a CMP, may remove portions of the gate fill conductive material 226, one or more conformal layers 224, and gate dielectric layer 222 above the top surfaces of the first ILD 297, the CESL 296, and gate spacers 286. The replacement gate structures 228a, 228b, each including the gate fill conductive material 226, one or more conformal layers 224, gate dielectric layer 222, and interfacial dielectric 220, may therefore be formed as illustrated in FIG. 4.