FIG. 3E′ is a cross-sectional view of the FinFET 20 taken along the line II-IF of FIG. 2E. Referring to FIGS. 2E and 3E′, the fins 116 that are not covers by the stack structures 120 are recessed until the stop layer 104 is removed. The stop layer 104 functions as an etching stop layer during the etching process for removing the exposed portions 118 (FIG. 2D) and the profile of the recess 128 can be well controlled. In FIG. 3E′, the etching process for removing the exposed portions 118 of the fins 116 to form the recesses 128 includes at least one etching process. In one embodiment, the fin 116 is etched through one anisotropic etching process until the stop layer 104 is removed. In some embodiments, by adjusting the etching conditions of the anisotropic etching process, the resultant recess 128 in the fin 116 has a depth D1 and has a substantially vertical side profile, so that the top critical dimension (the top dimension of the recess) CDt, the middle critical dimension (the middle dimension of the recess) CDm and the bottom critical dimension (the bottom dimension of the recess) CDb of the resultant recess 128 are substantially equivalent. The depth D1 of the recesses 128 is adjustable depending on the process needs.

As shown in FIG. 3E′, the stop layer 104 within the fins 116 under the stack structure 120 is remained. In some embodiments, the bottom 128b of the recess 128 is substantially leveled with the stop layer 104 embedded within the fins 116.