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Fin-type field effect transistor structure and manufacturing method thereof

專利號(hào)
US10868179B2
公開日期
2020-12-15
申請(qǐng)人
Taiwan Semiconductor Manufacturing Co., Ltd.(TW Hsinchu)
發(fā)明人
Che-Cheng Chang; Chih-Han Lin
IPC分類
H01L29/78; H01L29/10; H01L29/66
技術(shù)領(lǐng)域
etching,fins,strained,finfet,layer,stop,recess,insulators,stack,in
地域: Hsinchu

摘要

A fin-type field effect transistor comprising a substrate, a plurality of insulators, at least one gate stack and strained material portions is described. The substrate has a plurality of fins thereon and the fin comprises a stop layer embedded therein. The plurality of insulators is disposed on the substrate and between the plurality of fins. The at least one gate stack is disposed over the plurality of fins and on the plurality of insulators. The strained material portions are disposed on two opposite sides of the at least one gate stack.

說明書

FIG. 2B is a perspective view of the FinFET 20 at one of various stages of the manufacturing method, and FIG. 3B is a cross-sectional view of the FinFET 20 taken along the line I-I′ of FIG. 2B. In Step 12, as shown in FIG. 2B, the substrate 100 is patterned to form trenches 112 in the substrate 100 and the fins 116 are formed between the trenches 112 by etching into the substrate 100, using the photosensitive pattern 110 and the mask layer 108 as etching masks. In some embodiments, the trenches 112 are strip-shaped and arranged in parallel. Counting from the surface 100a of the substrate 100, the trench 112 has a depth D larger than a depth d of the stop layer 104. During the patterning of the substrate 100, the stop layer 104 is partially removed at the locations of the trenches 112, while the stop layer 104 is remained within the fins 116. That is, the fins 116 are inset with the stop layer 104, the stop layer 104 embedded in the fins 116 is located at a position higher than a bottom 112a of the trench 112.

權(quán)利要求

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