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FinFET device and methods of forming the same

專利號
US10868183B2
公開日期
2020-12-15
申請人
Taiwan Semiconductor Manufacturing Company, Ltd.(TW Hsinchu)
發(fā)明人
Shahaji B. More; Shih-Chieh Chang; Cheng-Han Lee
IPC分類
H01L29/78; H01L29/66; H01L29/10; H01L29/08; H01L27/092; H01L29/423; H01L21/768; H01L21/8238; H01L21/225; H01L29/161
技術(shù)領(lǐng)域
germanium,dopant,fin,in,region,finfet,layer,epitaxial,segment,silicon
地域: Hsinchu

摘要

A semiconductor device includes a substrate; a fin protruding above the substrate, the fin including a compound semiconductor material that includes a semiconductor material and a first dopant, the first dopant having a different lattice constant than the semiconductor material, where a concentration of the first dopant in the fin changes along a first direction from an upper surface of the fin toward the substrate; a gate structure over the fin; a channel region in the fin and directly under the gate structure; and source/drain regions on opposing sides of the gate structure, the source/drain regions including a second dopant, where a concentration of the second dopant at a first location within the channel region is higher than that at a second location within the channel region, where the concentration of the first dopant at the first location is lower than that at the second location.

說明書

BACKGROUND

Semiconductor devices are used in a variety of electronic applications, such as, for example, personal computers, cell phones, digital cameras, and other electronic equipment. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductor layers of material over a semiconductor substrate, and patterning the various material layers using lithography to form circuit components and elements thereon.

The semiconductor industry continues to improve the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) by continual reductions in minimum feature size, which allow more components to be integrated into a given area. However, as the minimum features sizes are reduced, additional problems arise that should be addressed.

BRIEF DESCRIPTION OF THE DRAWINGS

Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

FIG. 1 illustrates an example of a FinFET in a three-dimensional view, in accordance with some embodiments.

FIGS. 2-5 are cross-sectional views of intermediate stages in the manufacturing of a FinFET device 100, in accordance with an embodiment.

權(quán)利要求

1
What is claimed is:1. A semiconductor device comprising:a substrate;a fin protruding above the substrate, the fin comprising a compound semiconductor material that includes a semiconductor material and a first dopant, the first dopant having a different lattice constant than the semiconductor material, wherein a concentration of the first dopant in the fin changes along a first direction from an upper surface of the fin toward the substrate;a gate structure over the fin;a channel region in the fin and directly under the gate structure; andsource/drain regions on opposing sides of the gate structure, the source/drain regions comprising a second dopant, wherein a concentration of the second dopant diffused from the source/drain regions into the channel region changes along the first direction, wherein the concentration of the second dopant at a first location within the channel region is higher than that at a second location within the channel region, wherein the concentration of the first dopant at the first location is lower than that at the second location.2. The semiconductor device of claim 1, wherein the compound semiconductor material is silicon germanium, the semiconductor material is silicon, and the first dopant is germanium.3. The semiconductor device of claim 1, wherein the channel region comprises a first segment, the concentration of the first dopant in the first segment increases along the first direction, and the concentration of the second dopant in the first segment decreases continuously along the first direction.4. The semiconductor device of claim 1, further comprising a capping layer over the channel region of the fin, wherein the capping layer is substantially free of the first dopant.5. The semiconductor device of claim 1, wherein the fin comprises a first segment, the concentration of the first dopant in the first segment increases continuously along the first direction.6. The semiconductor device of claim 5, wherein the fin further comprises a second segment between the first segment and the substrate, the concentration of the first dopant in the second segment is lower than a lowest concentration of the first dopant in the first segment.7. The semiconductor device of claim 6, wherein the fin further comprises a third segment between the first segment and the second segment, and the concentration of the first dopant in the third segment is uniform.8. The semiconductor device of claim 7, wherein the concentration of the first dopant in the third segment is substantially equal to a highest concentration of the first dopant in the first segment.9. The semiconductor device of claim 7, wherein the fin further comprises a fourth segment over the first segment, with the first segment between the fourth segment and the third segment, wherein the concentration of the first dopant in the fourth segment is uniform.10. The semiconductor device of claim 9, wherein the concentration of the first dopant in the fourth segment is lower than the concentration of the first dopant in the third segment.11. The semiconductor device of claim 1, wherein the fin comprises a buffer layer, a first sublayer over the buffer layer, and a second sublayer over the first sublayer, wherein the concentration of the first dopant in the first sublayer has a first value, the concentration of the first dopant in the second sublayer has a second value smaller than the first value, wherein the concentration of the first dopant in the buffer layer has a third value smaller than the second value.12. A semiconductor device comprising:a fin over a substrate, the fin comprising silicon germanium;a gate structure over the fin;a channel region in the fin, the gate structure being disposed over the channel region, a concentration of germanium in the channel region changing along a first direction from an upper surface of the fin distal from the substrate to the substrate, wherein a concentration of germanium increases from a first location of the channel region to a second location of the channel region, wherein the first location and the second location are aligned along the first direction; anda source/drain region in the fin and adjacent to the gate structure, the source/drain region comprising a dopant that diffuses into the channel region, a concentration of the dopant in the channel region changing along the first direction, wherein a concentration of the dopant decreases from the first location of the channel region to the second location of the channel region.13. The semiconductor device of claim 12, wherein the dopant is boron or antimony.14. The semiconductor device of claim 12, wherein the source/drain region comprises a first sublayer, a second sublayer over the first sublayer, and a third sublayer over the second sublayer, wherein the first sublayer has a first concentration of the dopant, the second sublayer has a second concentration of the dopant, and the third sublayer has a third concentration of the dopant, wherein the third concentration is higher than the second concentration, and the second concentration is higher than the first concentration.15. The semiconductor device of claim 12, wherein the fin comprises a gradient layer, wherein the concentration of germanium in the gradient layer increases along the first direction.16. The semiconductor device of claim 15, wherein the fin further comprises a buffer layer between the gradient layer and the substrate, wherein the concentration of germanium in the buffer layer is lower than the concentration of germanium in the gradient layer.17. A semiconductor device comprising:a fin protruding from a substrate, the fin comprising silicon germanium, wherein a concentration of germanium in the fin varies along a first direction from an upper surface of the fin toward the substrate;a gate over a channel region of the fin, wherein a concentration of germanium in the channel region increases from a first location of the channel region to a second location of the channel region, wherein the first location and the second location are aligned along the first direction; anda doped source/drain region in the fin and adjacent to the gate, wherein a dopant of the doped source/drain region diffuses into the channel region of the fin, wherein a concentration of the dopant in the channel region varies along the first direction, wherein the concentration of the dopant decreases from the first location of the channel region to the second location of the channel region.18. The semiconductor device of claim 17, wherein the channel region of the fin between the first location and the second location form a gradient segment of the channel region, wherein the channel region of the fin further comprises a first segment between the gradient segment and the substrate, wherein a first concentration of germanium in the first segment is uniform.19. The semiconductor device of claim 18, wherein the channel region of the fin further comprises a second segment over the gradient segment such that the gradient segment is between the second segment and the first segment, wherein a second concentration of germanium in the second segment is uniform.20. The semiconductor device of claim 19, wherein the first concentration is higher than the second concentration.
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