FIGS. 6-10 illustrate cross-sectional views of various embodiments of a fin of the FinFET device 100 of FIG. 5, in accordance with various embodiments.
FIGS. 11-14, 15A, 15B, 16A, 16B, 17A, 17B, 17C, 17D, 18A, 18B, 19A, 19B, 20A, 20B, 21A, 21B, 22A, 22B, 23A, and 23B are cross-sectional views of intermediate stages in the manufacturing of the FinFET device 100 following the processing of FIG. 5, in accordance with an embodiment.
FIGS. 24A and 24B illustrate the concentrations of boron and germanium, respectively, in the channel region of a FinFET device, in an embodiment.
FIG. 25A illustrates the threshold voltage of a FinFET device with boron diffused into the channel region, in an embodiment.
FIG. 25B illustrates the concentration of germanium in the channel region of a FinFET device, in an embodiment.
FIG. 25C illustrates the threshold voltage of a FinFET device with boron diffusion as illustrated in FIG. 25A and with germanium doped into the channel region as illustrated in FIG. 25B, in an embodiment.
FIG. 26 illustrates a flow chart of a method for forming a semiconductor device, in accordance with some embodiments.
DETAILED DESCRIPTION
