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FinFET device and methods of forming the same

專利號
US10868183B2
公開日期
2020-12-15
申請人
Taiwan Semiconductor Manufacturing Company, Ltd.(TW Hsinchu)
發(fā)明人
Shahaji B. More; Shih-Chieh Chang; Cheng-Han Lee
IPC分類
H01L29/78; H01L29/66; H01L29/10; H01L29/08; H01L27/092; H01L29/423; H01L21/768; H01L21/8238; H01L21/225; H01L29/161
技術(shù)領(lǐng)域
germanium,dopant,fin,in,region,finfet,layer,epitaxial,segment,silicon
地域: Hsinchu

摘要

A semiconductor device includes a substrate; a fin protruding above the substrate, the fin including a compound semiconductor material that includes a semiconductor material and a first dopant, the first dopant having a different lattice constant than the semiconductor material, where a concentration of the first dopant in the fin changes along a first direction from an upper surface of the fin toward the substrate; a gate structure over the fin; a channel region in the fin and directly under the gate structure; and source/drain regions on opposing sides of the gate structure, the source/drain regions including a second dopant, where a concentration of the second dopant at a first location within the channel region is higher than that at a second location within the channel region, where the concentration of the first dopant at the first location is lower than that at the second location.

說明書

In some embodiments, a P-well is formed in the region 50B (e.g., a region for n-type devices), and an N-well is formed in the region 50C (e.g., a region for p-type devices). The P-well and the N-well may each be formed by an implantation process followed by an anneal process. For example, to form the N-well in the region 50C, a mask layer may be formed to cover the region 50B and to expose the region 50C, and an n-type dopant (e.g., phosphorous, arsenic) is then implanted into the region 50C. The mask layer is then removed by a suitable method after the implantation process. An anneal process may be performed to activate the implanted dopant. Similarly, another mask layer may be formed to cover the region 50C and to expose the region 50B, a p-type dopant (e.g., boron, BF2) is then implanted into the region 50B, and thereafter, the another mask layer is removed, followed by an anneal process. In some embodiments, both the region 50B and the region 50C are used to form the same type of devices, such as both regions being for n-type devices or p-type devices, in which case a P-well or an N-well are formed in both the region 50B and the region 50C.

Next, in FIG. 3, an epitaxial material 52, such as an epitaxial silicon layer, is formed over the substrate 50 through an epitaxy process. In the example of FIG. 3, an epitaxial silicon layer is formed in both the region 50C and the region 50B.

權(quán)利要求

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