Semiconductor chip
地域：
Kanagawa
摘要
Provided is a semiconductor chip including a nanowire field effect transistor (FET) and having a layout configuration effective for making manufacturing the chip easy. A semiconductor chip includes a first block including a standard cell having a nanowire FET and a second block including a nanowire FET. In the first and second blocks, nanowires extending in an X direction have an arrangement pitch in a Y direction of an integer multiple of a pitch P1. Pads have an arrangement pitch in the X direction of an integer multiple of a pitch P2.
說明書
The present disclosure provides a layout configuration of a semiconductor integrated circuit device including a nanowire FET, the layout configuration being effective for making manufacturing the device easy, and is useful for improving performance of the semiconductor integrated circuit device.
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