FIG. 8 depicts operations of an example method for realigning an oscillator, in accordance with some embodiments. FIG. 8 is described with reference to FIG. 1 above for ease of understanding. But the process of FIG. 8 is applicable to other circuits as well. The oscillator (e.g., oscillator 100) includes an inductor (e.g., inductor 114) having first and second terminals (e.g., first and second terminals 116, 118) and a capacitor (e.g., a capacitor comprising varactor capacitors 109 and a MOM capacitor array with banks of capacitors 111A, 111B) electrically coupled in parallel to the inductor at the first and second terminals. The oscillator also includes a first transistor (e.g., a transistor of the realignment circuit 102) of a first conductivity type (e.g., P-type) coupled to the first terminal. At 802, a first realignment signal (e.g., realignment signal RLB) is provided to a gate of the first transistor. The first realignment signal includes a realignment state (e.g., a state where the first realignment signal is logic level low) and a normal state (e.g., a state where the first realignment signal is logic level high), and a voltage level of the first realignment signal in the normal state is opposite to the voltage level of the first realignment signal in the realignment state. At 804, when the first realignment signal is in the realignment state, the first transistor is turned on, and a voltage of the first terminal is increased from a low level to a high level in order to align a phase of a waveform of the oscillator. At 806, the first transistor is turned off when the first realignment signal is in the normal state.