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Oscillator circuits and methods for realignment of an oscillator circuit

專利號
US10868496B1
公開日期
2020-12-15
申請人
Taiwan Semiconductor Manufacturing Company Limited（TW Hsinchu）
發(fā)明人
Tsung-Hsien Tsai; Ruey-Bin Sheen; Chih-Hsien Chang; Cheng-Hsiang Hsieh
IPC分類
H03B5/12; H03B5/04; H03L7/081; H03K3/00; H03B17/00; H03L7/26; H03K5/156
技術(shù)領(lǐng)域
rlb,oscillator,rl,signal,terminal,pmos,in,nmos,transistor,first
地域： Hsinchu

摘要

Oscillators and methods for realignment of an oscillator are provided. An oscillator includes an inductor having first and second terminals and a capacitor electrically coupled in parallel to the inductor at the first and second terminals. A first transistor of a first conductivity type is electrically coupled to the first terminal and a voltage source. The first transistor includes a gate configured to receive a first realignment signal. When the first realignment signal is in a realignment state, the first transistor is turned on and a voltage of the first terminal is increased from a low level to a high level in order to align a phase of a waveform of the oscillator.

說明書

PMOS transistors M0 and M1 of the oscillator 100 form a first cross-coupled pair. The gate terminal of transistor M0 is coupled to the drain terminal of transistor M1, and the gate terminal of transistor M1 is coupled to the drain terminal of transistor M0. The cross-coupled PMOS transistors M0 and M1 form a latch. As shown in FIG. 1, The source terminals of transistors M0 and M1 are coupled to node NVDD having operational voltage VDD. NMOS transistors M2 and M3 of the oscillator 100 form a second cross-coupled pair. The gate terminal of transistor M2 is coupled to the drain terminal of transistor M3, and the gate terminal of transistor M3 is coupled to the drain terminal of transistor M2. The cross-coupled NMOS transistors M2 and M3 form a latch.

權(quán)利要求

1
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