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CMOS input stage circuits and related methods

專(zhuān)利號(hào)
US10868505B1
公開(kāi)日期
2020-12-15
申請(qǐng)人
Silicon Laboratories Inc.（US TX Austin）
發(fā)明人
Mohamed M. Elsayed; Sudipta Sarkar
IPC分類(lèi)
H03F3/45
技術(shù)領(lǐng)域
pmos,vcross,input,nmos,current,voltage,pair,stage,transistor,cmos
地域： TX TX Austin

摘要

Embodiments of improved CMOS input stage circuits and related methods are provided herein to maintain a near constant transconductance across an entire common-mode input voltage range of the input stage. One embodiment includes a pair of NMOS input transistors and a pair of PMOS input transistors, each coupled to receive a differential input voltages at their gate terminals; a current source coupled to source terminals of the pair of PMOS input transistors and configured to generate a current; a current steering circuit configured to steer the current to the pair of NMOS input transistors and/or to the pair of PMOS input transistors, depending on whether a common mode input voltage (CMV) is greater than, less than, or substantially equal to a cross-over voltage; and a current stealing circuit configured to reduce the current when the CMV is substantially equal to the cross-over voltage.

說(shuō)明書(shū)

Generally speaking, the present disclosure provides various embodiments of improved CMOS input stage circuits and related methods to maintain a near constant transconductance (gm) in a voltage region surrounding a cross-over voltage (Vcross) boundary between a low common-mode voltage (CMV) region and a high CMV region. Unlike conventional CMOS input stage circuits, the CMOS input stage circuit described herein uses a current steering circuit to steer the tail current between the complementary input pairs, and a current stealing circuit to reduce a current supplied to the complementary input pairs when the CMV is close to a cross-over voltage (Vcross).

權(quán)利要求

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