The third PMOS transistor P11 is coupled in parallel with the second PMOS input pair (P9, P10) and configured to receive the cross-over voltage (V_cross) supplied to PMOS transistors P7 and P8. More specifically, the third PMOS transistor P11 has a source terminal coupled to the source terminals of PMOS transistors (P9 and P10) in the second PMOS input pair, a gate terminal coupled to receive V_cross, and a drain terminal coupled to the gate and drain terminals of the third NMOS transistor N11. The source terminal of the third NMOS transistor N11 is coupled to ground (or V_SS). As described in more detail below, the third PMOS transistor P11 may be generally configured to prevent or allow tail current (i.e., a second current, I₂) from the second current source 580 to flow through the PMOS transistors (P9, P10) of the second PMOS input pair to the NMOS transistor N10 in the second NMOS current mirror (N9, N10), depending on whether the common-mode input voltage is greater than or less than the cross-over voltage (V_cross).

As noted above, current stealing circuit 570 is configured to steal a portion of the tail current (i.e., the first current, I₁) generated by the first current source 550 when the common-mode input voltage supplied to the NMOS input pair (N1, N2), the first PMOS input pair (P1, P2) and the second PMOS input pair (P9, P10) is substantially equal to the cross-over voltage (V_cross).