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CMOS input stage circuits and related methods

專利號(hào)
US10868505B1
公開日期
2020-12-15
申請(qǐng)人
Silicon Laboratories Inc.(US TX Austin)
發(fā)明人
Mohamed M. Elsayed; Sudipta Sarkar
IPC分類
H03F3/45
技術(shù)領(lǐng)域
pmos,vcross,input,nmos,current,voltage,pair,stage,transistor,cmos
地域: TX TX Austin

摘要

Embodiments of improved CMOS input stage circuits and related methods are provided herein to maintain a near constant transconductance across an entire common-mode input voltage range of the input stage. One embodiment includes a pair of NMOS input transistors and a pair of PMOS input transistors, each coupled to receive a differential input voltages at their gate terminals; a current source coupled to source terminals of the pair of PMOS input transistors and configured to generate a current; a current steering circuit configured to steer the current to the pair of NMOS input transistors and/or to the pair of PMOS input transistors, depending on whether a common mode input voltage (CMV) is greater than, less than, or substantially equal to a cross-over voltage; and a current stealing circuit configured to reduce the current when the CMV is substantially equal to the cross-over voltage.

說明書

In addition to providing near constant gm across the entire common mode voltage range and limiting phase margin degradation in the Vcross boundary region, one skilled in the art would understand how the CMOS input stage 500 shown in FIGS. 5 and 6 could be used to provide additional advantages. For example, if CMOS input stage 500 is used to maintain a near constant gm1 across the entire common-mode input voltage range and minimize phase margin degradation in the first stage of a two-stage operational amplifier (such as amplifier 300 of FIG. 3 (Prior Art)), the transconductance (gm2) of the second stage can be reduced. Since most of the amplifier power is consumed in the second stage, the total power consumed by the operational amplifier can be significantly reduced by using CMOS input stage 500 to minimize phase margin degradation in the first stage and configuring the second stage with a minimum required amount of transconductance (gm2). This enables a less complex architecture to be used in the second stage of the operational amplifier.

權(quán)利要求

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