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Biasing circuits for voltage controlled or output circuits

專利號
US10868507B2
公開日期
2020-12-15
申請人
Ronald Quan
發(fā)明人
Ronald Quan
IPC分類
H03G1/00; H03F3/45; H03F1/02; H03G3/30
技術(shù)領(lǐng)域
voltage,fet,q1b,amplifier,vds,drain,q1a,or,rfb,r7
地域： CA CA Cupertino

摘要

A number of biasing circuits for amplifiers including voltage controlled amplifier is presented. Also a number of field effect transistor circuits include voltage controlled attenuators or voltage controlled processing circuits. Example circuits include modulators, lower distortion variable voltage controlled resistors, sine wave to triangle wave converters, and or servo controlled biasing circuits.

說明書

This application claims priority to U.S. provisional Ser. No. 62/607,907 filed on Dec. 19, 2017, which is incorporated herein by reference.

BACKGROUND

One or more inventions and or embodiments belong in the field of biasing circuits typically but not limited to amplifier circuits. Also one or more embodiments relates to Field Effect Transistor (FET) circuits used in providing voltage controlled amplitude circuits, waveform shaping circuits.

SUMMARY

One or more embodiments include biasing for voltage controlled circuits such as voltage controlled amplifier(s), voltage controlled(s) multipliers, or voltage controlled quiescent biasing for output stage(s).

One or more embodiments can be included with one or more circuits mentioned in U.S. Pat. No. 4,458,213 titled “Constant Quiescent Current, Class AB Output Stage” by Ronald Quan, issued on Jul. 3, 1984, and or U.S. Pat. No. 6,617,910 titled “Low Noise Analog Multiplier Utilizing Nonlinear Local Feedback Elements” by Ronald Quan, issued on Sep. 9, 2001, U.S. Pat. No. 4,458,213 titled “Constant Quiescent Current, Class AB Output Stage” by Ronald Quan, issued on Jul. 3, 1984, and U.S. Pat. No. 6,617,910 titled “Low Noise Analog Multiplier Utilizing Nonlinear Local Feedback Elements” by Ronald Quan, issued on Sep. 9, 2001, which are all incorporated by reference.

The one or more embodiments are included in one or more of the following:

A) As a voltage reference circuit such as a VBE (voltage base-emitter) multiplier or VGS (voltage gate to source) multiplier.

B) A variable or voltage controlled voltage reference multiplier circuit using a field effect transistor or bipolar transistor

權(quán)利要求

1
That which is claimed is:1. A circuit for providing low distortion in a voltage controlled amplifier that provides voltage controlled gain comprising:a first transistor including a collector terminal, a base terminal, and an emitter terminal;a second transistor including a collector terminal, base terminal, and an emitter terminal;a third transistor including a collector terminal, base terminal, and an emitter terminal;a fourth transistor including a collector terminal, base terminal, and an emitter terminal;a first amplifier having an input terminal and an output terminal;a second amplifier having an input terminal and an output terminala first resistor including a first terminal and a second terminal;a second resistor including a first terminal and a second terminal;a third resistor including a first terminal and a second terminal;a fourth resistor including a first terminal and a second terminal;a control voltage coupled to the base terminal of the first transistor or to the base terminal of the second transistor;coupling the emitter of the first transistor to the collector of the third transistor,coupling the collector terminal of the third transistor to the input terminal of the first amplifier;coupling the output terminal of the first amplifier to the first terminal the first resistor;coupling the second terminal of the first resistor to the base terminal of the third transistor;coupling the first terminal of the second resistor to the base terminal of the third transistor;coupling the second terminal of the second resistor to the emitter terminal of the third transistor;coupling the emitter terminal of the third transistor to the emitter terminal of the fourth transistor;coupling the emitter terminal of the second transistor to the collector terminal of the fourth transistor;coupling the collector terminal of the second transistor to the input terminal, of the second amplifier;coupling the output terminal of the second amplifier to the first terminal of the third resistor;coupling the second terminal of the third resistor to the base terminal of the fourth transistor;coupling the second terminal of the third resistor to first terminal of the fourth resistor;coupling the second terminal of the fourth resistor to the emitter of the fourth transistor;supplying a signal source to the emitter terminals of the third and fourth transistors;providing an output signal at the collector terminal of the first transistor or the collector terminal of the second transistor wherein the control signal controls the gain of the voltage controlled amplifier.2. The circuit of claim 1 wherein the first or second amplifier has a gain of substantially one.3. The circuit of claim 1 wherein the signal source is provided via a collector terminal of a fifth transistor.4. The circuit of claim 1 further comprising a third amplifier including an input terminal and an output terminal;further comprising a fourth amplifier including an input terminal and an output terminal.5. The circuit of claim 4 further comprising coupling the emitter terminal of the third transistor to the input terminal of the third amplifier wherein the output terminal of the third amplifier is coupled to the second terminal of the second resistor;further comprising coupling the emitter terminal of the fourth transistor to the input terminal of the fourth amplifier wherein the output terminal of the fourth amplifier is coupled to the second terminal of the fourth resistor.6. The circuit of claim 5 wherein the first amplifier, second amplifier, third amplifier, and fourth amplifier provides the output signal that is related to an exponential relationship with the control signal.7. The circuit of claim 6 wherein the noise contributions from the first and second transistors is reduced at the output signal.
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