In another embodiment to increase linearity of the drain to source resistance of field effect transistors such as those in FIG. 28, FIG. 29, and or FIG. 30, the field effect transistors may include coupling a feedback resistor from the drain to the gate, and or with the gate including a series gate resistor. For example see circuits in FIG. 4 and or FIG. 5 (e.g., including a buffer amplifier U1A in FIG. 5.) including Rfb and or R7.
Another embodiment includes utilizing the drain to source or source to drain terminals of a field effect transistor to replace or substitute a resistor such as R6, R8, R7 and or R9 in FIG. 25, FIG. 26, and or FIG. 27. Another embodiment includes utilizing the drain to source or source to drain terminals of a field effect transistor to replace or substitute a resistor such as R6 and or R8, in FIG. 27. The drain to source or source to drain terminals may include providing a resistance characteristic and or a current source characteristic.
