What is claimed is:1. A method of manufacturing a resonance apparatus, comprising:forming a lower electrode;forming a piezoelectric layer on the lower electrode;forming an upper electrode on the piezoelectric layer; andforming a conductive layer on at least one of the upper electrode and the lower electrode,wherein the lower electrode, the piezoelectric layer, and the upper electrode are comprised in a resonance unit,wherein the conductive layer partially surrounds the resonance unit, andwherein the forming of the conductive layer includes forming a first conductive layer on the lower electrode so the formed first conductive layer vertically overlaps only a portion of the lower electrode, or forming a second conductive layer on the upper electrode so the formed second conductive layer vertically overlaps only a portion of the upper electrode.2. The method of claim 1, further comprising:forming a pad by vapor depositing a conductive material on a partial region of a substrate,wherein the pad is configured to respectively connect at least one of the upper electrode and the lower electrode to an external terminal.3. The method of claim 1, further comprising:forming a grounding unit by vapor depositing a conductive material on a substrate,wherein the grounding unit is configured to respectively connect one of a first upper electrode and a first lower electrode of one or more resonators of plural resonators to ground.4. The method of claim 1, further comprising:forming a loss compensation layer on the upper electrode.5. The method of claim 4, wherein the forming of the loss compensation layer includespatterning an edge of the upper electrode, oretching a trench in the upper electrode.6. The method of claim 4, wherein the forming of the loss compensation layer comprises:vapor depositing a material comprising any one or any combination of any two or more of molybdenum (Mo), ruthenium (Ru), gold (Au), silicon dioxide (SiO2), and silicon nitride (SiN) on the upper electrode; andpatterning an edge of the material.7. The method of claim 4, wherein the forming of the loss compensation layer comprises:doping a portion of the upper electrode with a predetermined impurity; andpatterning an edge of the doped upper electrode.8. The method of claim 7, wherein the predetermined impurity comprises any one or any combination of any two or more of boron (B), phosphorus (P), arsenic (As), germanium (Ge), stibium (Sb), silicon (Si), and aluminum (Al).9. The method of claim 4, further comprising:forming a loss compensation conductive layer by vapor depositing a conductive material on the loss compensation layer.10. The method of claim 1, further comprising:forming a reflective layer on the substrate.11. The method of claim 10,wherein the forming of the reflective layer comprises:forming a first reflective layer; andforming a second reflective layer on the substrate, the first reflective layer being formed on the second reflective layer, andwherein the first reflective layer has a lower acoustic impedance than the second reflective layer.12. The method of claim 10, wherein the lower electrode is formed on the reflective layer.13. The method of claim 1, wherein the forming of the conductive layer includes the forming of the first conductive layer and the forming of the second conductive layer.14. The method of claim 1, wherein the conductive layer is formed by vapor depositing a conductive material on the at least one of the upper electrode and the lower electrode.