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Logic cell structure and integrated circuit with the logic cell structure

專(zhuān)利號(hào)
US10868538B1
公開(kāi)日期
2020-12-15
申請(qǐng)人
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.(TW Hsinchu)
發(fā)明人
Shao-Huan Wang; Chun-Chen Chen; Sheng-Hsiung Chen; Kuo-Nan Yang
IPC分類(lèi)
H03K19/17704; H01L23/528; H03K19/17736; H01L27/02; G06F30/392
技術(shù)領(lǐng)域
doped,cell,logic,row,portion,layout,rows,second,first,in
地域: Hsinchu

摘要

A logic cell structure includes: a first portion, with a first height, arranged to be a first layout of a first semiconductor element; a second portion, with the first height, arranged to be a second layout of a second semiconductor element, wherein the first portion is separated from the second portion; and a third portion arranged to be a third layout of an interconnecting path used for coupling the first semiconductor element and the second semiconductor element.

說(shuō)明書(shū)

The cell structure 310 may be a fourth standard cell structure having a first portion 310a with the height T, a second portion 310b with the height T, and a third portion 310c with the height S1. The first portion 310a and the second portion 310b are separated by the third portion 310c. According to some embodiments, the upper boundary (i.e. B3) of the third portion 310c is abutted against a lower boundary of the first portion 310a, and a lower boundary (i.e. B4) of the third portion 310c is abutted against the upper boundary of the second portion 310b. The width of the cell structure 310 is W_d. The height S1 is substantially equal to the height S of the standard cell structure 304. The cell heights T and S1 may be constant heights and the width W_d may be a variable width. According to some embodiments, the first portion 310a, the second portion 310b, and the third portion 310c may be formed within a bounding box 310d of the cell structure 310. The width of the bounding box 310d is W_d, and the height of the bounding box 310d is the total of the heights (i.e. 2*T+S1) of the first portion 310a, the second portion 310b, and the third portion 310c. The first portion 310a, the second portion 310b, and the third portion 310c may be arranged to be a rectangular structure, and the rectangular structure may overlap with the bounding box 310d. According to some embodiments, the first portion 310a and the second portion 310b may comprise semiconductor elements, e.g. transistors, and the third portion 310c may comprise comprises the interconnecting paths for coupling the semiconductor elements in the first portion 310a and the semiconductor elements in the second portion 310b.

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