FIG. 5 shows a circuit diagram implementing the dual-read register 400 of FIG. 4 as an example RQL-compatible superconducting circuit 500. Input stage 502 of circuit 500 includes two input ports DI and LCLK, three Josephson junctions J2, J3, and J4, two input inductors L1 and L2, and a first transformer for inductively coupling a DC flux bias from a DC flux bias line. Input stage 502 corresponds to, and provides the functionality of, D latch 402 from FIG. 4. First output stage 504 of circuit 500 includes an input port RE_A, an output port QO_A, two inductors L3_A, L4_A, two Josephson junctions J5_A, J6_A, and a second transformer for inductively coupling a DC flux bias from a DC flux bias line. First output stage 504 corresponds to, and provides the functionality of, AND gate 404 from FIG. 4. Second output stage 506 of circuit 500 includes an input port RE_B, an output port QO_B, two inductors L3_B, L4_B, two Josephson junctions J5_B, J6_B, and a third transformer for inductively coupling a DC flux bias from a DC flux bias line. Second output stage 506 corresponds to, and provides the functionality of, AND gate 406 from FIG. 4.
