Superconducting non-destructive readout circuits
地域：
MD
MD Ellicott City
摘要
Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.
說明書
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For each operation cycle, NDRO (i.e., read enable) input signals are timed to come after a set-up and hold time from the beginning of any LCLK (i.e., write enable), such that a data value written to the body stage 702 can be read out from the tail stage 704 within the same operation cycle. This timing can be enforced by support circuitry outside of circuit 700 and can employ, for example, JTLs configured to provide various signal time delays. A “half-select” condition is defined as an application of a logical “high” signal to data input DI without a corresponding logical “high” write enable signal on logical clock input LCLK.
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