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Superconducting non-destructive readout circuits

專利號
US10868540B2
公開日期
2020-12-15
申請人
Anna Y. Herr; Quentin P. Herr; Ryan Edward Clarke; Harold Clifton Hearne, III; Alexander Louis Braun; Randall M. Burnett; Timothy Chi-Chao Lee(US VA Falls Church)
發(fā)明人
Anna Y. Herr; Quentin P. Herr; Ryan Edward Clarke; Harold Clifton Hearne, III; Alexander Louis Braun; Randall M. Burnett; Timothy Chi-Chao Lee
IPC分類
H03K19/195; G11C11/44; H03K3/38; G06N10/00
技術(shù)領(lǐng)域
josephson,ndro,rql,junction,lclk,input,circuit,tail,j2,logical
地域: MD MD Ellicott City

摘要

Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.

說明書

FIG. 11 shows a circuit diagram implementing the single-read RQL D-register 600 of FIG. 6 as an example RQL-compatible superconducting circuit 1100, similar in form and function to circuit 700 of FIG. 7, but reducing, from two to one, the number of DC flux bias transformers in the circuit by implementing a Y-Δ transform of the central inductance network in the body stage 702 to arrive at body stage 1102, having inductors LL1 and LL2. Tail stage 1104 is unchanged from tail 704. Circuit 1200 of FIG. 12 provides a similar variation of the dual-read RQL D-register 800 of FIG. 8 as compared to circuit 900 of FIG. 9, illustrating that the variation of the latch-based NDRO circuit shown in FIG. 11 can be built to a dual-read or multiple-read configuration by adding on NDRO tail stages 1204, 1206 to nodes 1208, 1210. Tail stages 1204, 1206 are unchanged from tail stages 904, 906; only the topology of body stage 1202 differs from the topology of body stage 902.

權(quán)利要求

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